When the vm starts, it starts executing code at 0x00000000
| Address | Size | Description |
|---|---|---|
| 0x00000000 | 0x00100000 | RAM |
| 0xF0000000 | 0x0003E800 | VGA buffer |
| 0xF1000000 | 0x000007D0 | Text video buffer |
| 0xF2000000 | 0x00000010 | video card control registers |
| 0xF3000000 | 0x00000002 | keyboard control registers |
A total of 16 32bit registers including 14 general purpose registers (r0-r13), a stack pointer (r14) and an instruction pointer (r15). There is also a Flags register that is not directly accessible. The format of the Flags register is:
| Z (zero) | c (carry) | i (ints enabled) | e (exception) |
|---|
No floating points nor signed integers. Only the "CMP" instruction modifies Z and C flags The assembler recognizes the format: {label:} mnemonic{.condition} {operand1}{,operand2}. Each instruction is (very inneficiently) encoded on 64bit:
| Bits | Description |
|---|---|
| 0-7 | instruction |
| 8-12 | operand1 register if applicable |
| 13-17 | operand2 register if applicable |
| 18-21 | condition |
| 22-31 | reserved |
| 32-64 | 32bit int for op1 or op2 if applicable |
Every instruction have the ability to be conditionally executed with the following suffixes
| Opcode | Mnemonic | Description |
|---|
| Opcode | Mnemonic | Description |
|---|
| Number | Description |
|---|---|
| 0 | Breakpoint |
| 1 | Undefined instruction |
| 2 | Invalid operands |
| 3 | Divide by zero |
| 4 | Illegal memory access |
At the end of an instruction, and after r15 has been updated, the CPU checks if a device has any pending IRQ if and only if the "i" flag is set. if an IRQ is pending, the CPU will check if a handler was registered for that IRQ with the "ireg" instruction. If a handler is found, the following occurs:
A handler should return using the "iret" instruction. The iret instruction restore the general register bank and pop the flags out of the stack
to switch video mode, write a 8bit value to 0xF2000000. A value of 0 will switch to vga mode 320x200 (the default) and a value of 1 will switch to 80x25 text mode.
The keyboard will trigger an IRQ #1 when a key is pressed. So a consumer must register a handler with the "ireg" instruction to receive those interrupts and the "i" flag must be set using the "sti" instruction. Once the consumer is ready to process the event, the key can be read from address 1 of the keyboard control memory. After a key is read from the buffer, the buffer will be updated with the new key if any. Failure to at address 1 will make the keyboard driver continue to raise IRQ 1 continuously.